BSDCan2016 - v1.1.24a

BSDCan 2016
The Technical BSD Conference

Arun Thomas
Day Talks #2 - 11 June - 2016-06-11
Room DMS 1110
Start time 14:45
Duration 01:00
ID 711
Event type Lecture
Track Embedded
Language used for presentation English

RISC-V: Berkeley Hardware for Your Berkeley Software (Distribution)

RISC-V is a new, completely open instruction set architecture from UC Berkeley, the birthplace of BSD. Berkeley has released a BSD-licensed processor implementation (Rocket), and they are building up a full software ecosystem for RISC-V. In this talk, I will describe the current status of FreeBSD and NetBSD on RISC-V. My hope is that we will eventually have RISC-V support for all the BSDs. After all, BSD software deserves BSD hardware.

I will provide an introduction to the RISC-V architecture as well as a discussion of the various RISC-V SoC options. I will also show how BSD kernels interface with the RISC-V architecture. This talk is meant to be a quick start guide for BSD hackers who are not familiar with the RISC-V architecture.